OPP3 and the ISP

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OPP3 and the ISP

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The OMAP3503 spec on the TI site suggests that running the ISP at 1.0 V (e.g., OPP2 in Table 3-3) will support a maximum pixel clock of approximately 45 MHz in (Table 6-23 p. 184):

t_{c(pclk)} = 22.2 ns  (min camera pixel clock period)
1/(22.2 *10^-9)=45045045

The boot log indicates OPP2 is the default configuration for the OMAP, which may explain why I've been seeing funny image artifacts with faster pixel clocks.    

The same table states that 1.15 V should support the full ISP pixel clock of 75 MHz.

t_{c(pclk)} = 13.3 ns  (min camera pixel clock period)
1/(13.3 *10^-9)=75187969.9

It seems that running with OPP3 will provide this.  Does anyone know how to configure the Gumstix 3503 boards with OPP3?  I'm guessing this would be achieved by a #define or parameter to u-boot.  I'm currently using U-boot 2010.09.

EDIT: I was able to run clean video through the ISP of a new Earth STORM @ 600 MHz (OMAP 3703) with a pixel clock of 72 MHz.  This has not been possible on all 3503 and 3530 boards I have tested using identical mpurate and pixel clock.  I have a large number of systems built with 3503 boards, however, and I still need to reproduce this behavior on that platform if possible.  I still think the OPP=3 setting could help there, but it isn't clear to me what the default build is booting at.  U-boot reports a boot message on the console at startup stating it is at OPP2, but I searched and found that it is hard coded.  It isn't clear if it is modified at a later stage based on mpurate or something else, and I can't seem to find any explicit mention of OPP levels in /proc/cpuinfo or the like.