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Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

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Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Nicola
This is one way for direct-register access control of the GPIO ARM interface of the Gumstix Overo Water.
I mounted the Gumstix on a TOBI board for connections. I obtained to control the gpio_186 digital pin.
The procedure can be easily extended to the other digital pins. I haven't recompiled the kernel or touched the setup files or
the pre-existing drivers... nothing of this.
This is my recipe:
1) install on a formatted SD card the stable Gumstix armstrong linux version ( see http://gumstix.org/get-started/how-to.html )
2) connect your Overo Water + Tobi system on Internet by LAN cable
3) connect the Gumstix to your windows PC by the USB cable and by the software putty.exe, open a control windows
   selecting an emulated serial connection (see putty instructions)
3) Check the internet link, use ( on the Gumstix )
   ifconfig eth1 192.168.0.5 netmask 255.255.255.0
 or whatever the desired IP address+netmask for connecting the Gumstix @ your router    
4) install the C cross compiler :
   $ echo 'src/gz angstrom-base http://www.angstrom-distribution.org/feeds/unstable/ipk/glibc/armv7a/base'  > /etc/opkg/angstrom-base.conf
   $ opkg update
   $ opkg install task-native-sdk
 or better use
   $ opkg update
   $ opkg install task-native-sdk
 for updating all the software.
5) Reboot the gustix
6) Put the following code on your home directory ( or wherewer you prefer ) editing it with
   VI main.c
 or with any other any other editor you like. I use normally Eclipse for editing my software on the PC and transferring
 it to the remote system (the Gumstix) ( contact me if you want more info on this);
 call the file "main.c"
 

/****************************************************************************************
                             LOCAL INCLUDES DEFINITION
 ****************************************************************************************/
#include <stdio.h> 
#include "init_mem.h"
#include "init_SPI_1.h"
#include <fcntl.h>      //ok for mmap param
#include <sys/mman.h>   //ok for mmap
/****************************************************************************************
                             LOCAL PARAMETERS DEFINITION
 ****************************************************************************************/
#define SCM_INTERFACE_BASE 0x48002000
#define SCM_PADCONFS_BASE 0x48002030
#define CONTROL_PADCONF_SYS_NIRQ (*(volatile unsigned long *)0x480021E0)
#define CONTROL_PADCONF_SYS_NIRQ_OFFSET 0x1B0

#define GPIO6_BASE 0x49058000
#define GPIO6_SYSCONFIG_OFFSET 0x10
#define GPIO6_CLEARDATAOUT_OFFSET 0x90
#define GPIO6_SETDATAOUT_OFFSET 0x94
#define GPIO6_OE_OFFSET 0x34
#define GPIO6_CTRL_OFFSET 0x30

#define MAP_SIZE (volatile unsigned long) 4*1024
#define MAP_MASK (volatile unsigned long)( MAP_SIZE - 1 )
/****************************************************************************************
                             COMMON VARIABLES DEFINITION
 ****************************************************************************************/
#define u32 volatile unsigned long
u32 *A;
u32 *B;
/****************************************************************************************
                             LOCAL FUNCTIONS DEFINITION
 ****************************************************************************************/


/****************************************************************************************
  Function name:     int main(void)
  Last modification: 04/08/2012
  Version:           1.10
  Notes:
 ****************************************************************************************/
int main(void){
unsigned long i;
int fd;
printf("\n\n\n\n\n\n\n");
printf("\n\n");
printf("   ------------------------------------------\n");
printf("   |               SPI Sample                |\n");
printf("   ------------------------------------------\n");
printf("   |   Direct Register Access GPIO           |\n");
printf("   ------------------------------------------\n");
printf("Base address  GPIO6: 0x%04x\n",(GPIO6_BASE ));// OK
printf("\n");

fd = open("/dev/mem", O_RDWR | O_SYNC);
if (fd < 0) {printf("Could not open file\n"); return;}
A = (u32 *) mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, SCM_INTERFACE_BASE & ~MAP_MASK);
 if (A == MAP_FAILED) {printf("Mapping failed    value 0x%04x\n",A); close(fd); return;} // %d.\n
 if (A<=0) {printf("Mapping failed\n"); close(fd); return;}
 printf("SCM_SCM_BASE 0x%08x\n",SCM_INTERFACE_BASE);
 printf("SCM_PADCONFS_BASE 0x%08x\n",SCM_INTERFACE_BASE+0x30);
 printf("SCM_PADCONFS offset 0x%08x\n",CONTROL_PADCONF_SYS_NIRQ_OFFSET);
 printf("Pointer: 0x%08x\n",(u32) A);
 printf("Pointer+offset: 0x%08x\n",(u32)A+0x30+CONTROL_PADCONF_SYS_NIRQ_OFFSET );
 printf("Pointer+offset content: 0x%08x\n",*(u32 *)((u32)A+0x30+CONTROL_PADCONF_SYS_NIRQ_OFFSET) );
 *(u32 *)((u32)A+0x30+CONTROL_PADCONF_SYS_NIRQ_OFFSET)|=(0b100<<16); // imposta mode 4 sul registro configurazione pad 186; abilita uso pin digitale
 close(fd);
 printf("PAD configuration done.\n",MAP_SIZE);
/************************************************/

fd = open("/dev/mem", O_RDWR | O_SYNC);
if (fd < 0) {printf("Could not open file\n"); return;}
B = (volatile unsigned long*) mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, GPIO6_BASE & ~MAP_MASK); // COM1 0x4806A000
  if (B == MAP_FAILED) {printf("Mapping failed    value 0x%04x\n",B); close(fd); return;} // %d.\n
  if (B<=0) {printf("Mapping failed\n"); close(fd); return;}

  printf("Map_Size: 0x%08x     ",MAP_SIZE);
  printf("Map_Mask: 0x%08x     ",MAP_MASK);
  printf("Map_Mask: Reverse 0x%08x\n",~MAP_MASK);
  printf("Base address: 0x%08x     ",(GPIO6_BASE & ~MAP_MASK));
  printf("Offset: 0x%08x     ",GPIO6_CTRL_OFFSET);
  printf("Base address+offset: 0x%08x\n",(GPIO6_BASE +GPIO6_CTRL_OFFSET));
  printf("Pointer: 0x%08x\n",(u32)B);
 
// gpio_186 handling
 printf("Pointer+offset: 0x%08x     ",(u32)B+(GPIO6_SYSCONFIG_OFFSET));
 printf("Pointer+offset content: 0x%08x     ",*(u32 *)((u32)B+GPIO6_SYSCONFIG_OFFSET));
 *(u32 *)((u32)B+GPIO6_SYSCONFIG_OFFSET)|= 0x00000004;// bit2=1 enable/wake up, free running  clock
 printf("Pointer+offset content: 0x%08x\n",*(u32 *)((u32)B+GPIO6_SYSCONFIG_OFFSET));
 printf("***\n");
   printf("Pointer+offset: 0x%08x     ",(u32)B+(GPIO6_CTRL_OFFSET));
   printf("Pointer+offset content: 0x%08x     ",*(u32 *)((u32)B+GPIO6_CTRL_OFFSET));
   *(u32 *)((u32)B+GPIO6_CTRL_OFFSET)&= 0xfffffffe;  // bit0=0 module enabled, clock not gated , clock=interface clock divided by 8
   //*(u32 *)((u32)B+GPIO6_CTRL_OFFSET)&= 0xfffffff8;  // bit0=0,bit1=0,bit2=0 module enabled, clock not gated , clock=interface clock not divided
   printf("Pointer+offset content mod: 0x%08x\n",*(u32 *)((u32)B+GPIO6_CTRL_OFFSET));
   printf("***\n");
 printf("Pointer+offset: 0x%08x     ",(u32)B+(GPIO6_OE_OFFSET));
 printf("Pointer+offset content: 0x%08x     ",*(u32 *)((u32)B+GPIO6_OE_OFFSET));
 *(u32 *)((u32)B+GPIO6_OE_OFFSET)&= 0xfbffffff;  // bit26=0, gpio_186 output
 printf("Pointer+offset content mod: 0x%08x\n",*(u32 *)((u32)B+GPIO6_OE_OFFSET));
 printf("***\n");
// generate a pulse stream on gpio_186 pin output
for (i=0;i<100000;i++){
        *(u32 *)((u32)B+(GPIO6_CLEARDATAOUT_OFFSET))|= 0x04000000;
        *(u32 *)((u32)B+(GPIO6_SETDATAOUT_OFFSET))  |= 0x04000000;
 }
close(fd);
printf("pointers to memory are ok\n") ;
return(0);
}// eof



7) compile the file "main.c" you have just created with
 gcc -o main main.c
8) execute the compiled file
 ./main
 and you'll see on gpio-186 ( on the TOBI board, the pin 17) the square waveform of 1.8Vpp.
 See
  http://www.gumstix.org/hardware-design/overo-coms/74-overo-connectors/97-gumstix-overo-series-40-pin-header.html
 for the TOBI connector pinout.
 That's all!
 PS Thanks to Dave Hylands for the advices.
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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Dave Hylands
Hi Nicola,

On Tue, Aug 14, 2012 at 12:41 PM, Nicola <[hidden email]> wrote:
> This is one way for direct-register access control of the GPIO ARM interface
> of the Gumstix Overo Water.
...snip...
> // generate a pulse stream on gpio_186 pin output
> for (i=0;i<100000;i++){
>         *(u32 *)((u32)B+(GPIO6_CLEARDATAOUT_OFFSET))|= 0x04000000;
>         *(u32 *)((u32)B+(GPIO6_SETDATAOUT_OFFSET))  |= 0x04000000;

So you should be using *(volatile u32 *)(stuff)

Otherwise the compiler may decide to optimize some of your code. For example

for (i=0;i<100000;i++){
   *a = 1;
   *b = 1;
}

will produce exactly the same effect as

*a = 1;
*b = 1;

and in fact it's also identical to

for (i=0;i<100000;i++){
   *b = 1;
   *a = 1;
}

or

*b = 1;
*a = 1;

Depending on the optimization level and other factors, the compiler
may decide to optimize your for loop to the 2nd, 3rd or 4th example
that I showed.

As a general rule, ALL register accesses should be done through
volatile pointers to prevent the compiler from re-ordering your code,
or optimizing it away completely.

--
Dave Hylands
Shuswap, BC, Canada
http://www.davehylands.com

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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Nicola
Hi Dave. Please explain to me: I've defined
#define  u32  volatile unsigned long
 and than I should use
 *(volatile u32 *)(stuff)
instead of
*(u32*) (stuff)
??????  but    *(u32*) (stuff)     isn't equivalent to *( volatile unsigned long *)(stuff)    ?
what you propose should be  (*volatile volatile unsigned long*(stuff)  ???
Under the point of view of the stream generation
*b = 1;
*a = 1;
or
*a = 1;
*b= 1;
doesn't matter and , in fact, I didn't matter!
Bye.
Nicola
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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Nicola
Hi guys. For a copy -paste error, I must rectify the incudes parte of the above posted code:
/****************************************************************************************
                             LOCAL INCLUDES DEFINITION
 ****************************************************************************************/
#include <stdio.h>  // for lprint instruction
#include <fcntl.h>      //ok for mmap param
#include <sys/mman.h>   //ok for mmap


no other inclusions are necessary. Sorry for the mistake.
Nicola

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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

justin baxter
Nicola,

Do you know what part I need to have a an Overo with 3 CAT5 ports?
Justin Baxter
Satlink Ltd

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On 15/08/2012 12:01, "Nicola" <[hidden email]> wrote:

>Hi guys. For a copy -paste error, I must rectify the incudes parte of the
>above posted code:
>/*************************************************************************
>***************
>                             LOCAL INCLUDES DEFINITION
>
>**************************************************************************
>**************/
>#include <stdio.h>  // for lprint instruction
>#include <fcntl.h>      //ok for mmap param
>#include <sys/mman.h>   //ok for mmap
>
>
>no other inclusions are necessary. Sorry for the mistake.
>Nicola
>
>
>
>
>
>--
>View this message in context:
>http://gumstix.8.n6.nabble.com/Direct-register-access-control-of-GPIO-ARM-
>interface-on-Overo-Water-TOBI-SOLVED-tp4965117p4965120.html
>Sent from the Gumstix mailing list archive at Nabble.com.
>
>--------------------------------------------------------------------------
>----
>Live Security Virtual Conference
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>threat landscape has changed and how IT managers can respond. Discussions
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>threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
>_______________________________________________
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>https://lists.sourceforge.net/lists/listinfo/gumstix-users



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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Dave Hylands
In reply to this post by Nicola
Hi Nicola,

On Wed, Aug 15, 2012 at 3:25 AM, Nicola <[hidden email]> wrote:
> Hi Dave. Please explain to me: I've defined
> #define  u32  volatile unsigned long
>  and than I should use
>  *(volatile u32 *)(stuff)
> instead of
> *(u32*) (stuff)
> ??????  but    *(u32*) (stuff)     isn't equivalent to *( volatile unsigned
> long *)(stuff)    ?

Sorry - I missed that. I just assumed u32 was a plain uint32 type (as
it is in the kernel).

> what you propose should be  (*volatile volatile unsigned long*(stuff)  ???

I normally macro-ize my register accesses and put the volatile in
there, so I don't need any casts in the calling code.

> Under the point of view of the stream generation
> *b = 1;
> *a = 1;
> or
> *a = 1;
> *b= 1;

In your particular example, where you're generating a pulse, the
difference will be the state of the stream at the end.

Sometimes it does matter, and when volatiles aren't used I have seen
the compiler reorder the stores.

--
Dave Hylands
Shuswap, BC, Canada
http://www.davehylands.com

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Re: Direct register access control of GPIO ARM interface on Overo Water +TOBI - SOLVED

Nicola
In reply to this post by justin baxter
?? I don't understand your question.
if you want to see if the rigth ports are opened when you're accessing internet
you must before connect your Gumstix to your router,e.g. with

root@overo:~#ifconfig eth1 192.168.1.15

after  type the command ifconfig and you should see something like

root@overo:~# ifconfig
eth1      Link encap:Ethernet  HWaddr 00:15:C9:28:FB:2F
          inet addr:192.168.1.15  Bcast:192.168.1.255  Mask:255.255.255.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:937 errors:0 dropped:0 overruns:0 frame:0
          TX packets:720 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:1328855 (1.2 MiB)  TX bytes:55723 (54.4 KiB)
          Interrupt:80

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          UP LOOPBACK RUNNING  MTU:16436  Metric:1
          RX packets:4 errors:0 dropped:0 overruns:0 frame:0
          TX packets:4 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:0
          RX bytes:552 (552.0 b)  TX bytes:552 (552.0 b)

then with the command netstat you'll se the opened ports:
                 
root@overo:~# netstat -anp --tcp
Active Internet connections (servers and established)
Proto Recv-Q Send-Q Local Address               Foreign Address             State       PID/Program name
tcp        0      0 0.0.0.0:5900                0.0.0.0:*                   LISTEN      1081/x11vnc
tcp        0      0 0.0.0.0:111                 0.0.0.0:*                   LISTEN      782/portmap
tcp        0      0 0.0.0.0:6000                0.0.0.0:*                   LISTEN      1050/Xorg
tcp        0      0 0.0.0.0:22                  0.0.0.0:*                   LISTEN      924/sshd
tcp        0      0 192.168.1.15:52330          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:52332          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:52331          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:52328          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:52333          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:52327          74.3.164.55:80              TIME_WAIT   -
tcp        0      0 192.168.1.15:37023          188.40.83.200:80            TIME_WAIT   -
tcp        0      0 192.168.1.15:52329          74.3.164.55:80              TIME_WAIT   -
root@overo:~#

as you can see, local port 22 is opened, i.e. the port used by the ASCII terminal,
as well as the remote port 80 normally used for the internet link.
Bye.
Nicola
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Gumstix OE tmp/rootfs dir always empty

MarkJ
This Gumstix.org web page:

http://gumstix.org/software-development/open-embedded/161-openembedded-directory-layout.html

 claims that:

"After an image recipe build this directory will contain the complete root file system for the image. This directory is suitable for nfs mounting."

When I run "bitbake omap3-console-image", however, nothing ever appears in this dir.  Now, everything else is in place (i.e. tmp/work/* and tmp/deploy/*, etc......).

Is there a particular build/config setting that I have missed that will cause the dir. to be populated as indicated?





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Re: Gumstix OE tmp/rootfs dir always empty

Nicola
To Mark....I'm afraid you issed something during OE and bitbake installation.
Let me suggest you two procedures:
http://gumstix.org/software-development/open-embedded/61-using-the-open-embedded-build-system.html
that I tested, or also
https://pixhawk.ethz.ch/tutorials/omap/openembedded_bitbake_installation

If you follow the instructions, the installation should come to a successful end and you will see
all the needed directories .
Bye.
Nicola
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Re: Gumstix OE tmp/rootfs dir always empty

MarkJ
I have no problem producing successful builds.  I get all the right stuff in the "deploy" dir. and I have installed and run MLO, u-boot, uImage and the rootfs on my overo Air.  But I want to understand why "a complete rootfs" does not appear in tmp/rootfs on my build machine like the webpage says.



-----Original Message-----
From: Nicola [mailto:[hidden email]]
Sent: Wednesday, August 15, 2012 1:07 PM
To: [hidden email]
Subject: Re: [Gumstix-users] Gumstix OE tmp/rootfs dir always empty

To Mark....I'm afraid you issed something during OE and bitbake installation.
Let me suggest you two procedures:
http://gumstix.org/software-development/open-embedded/61-using-the-open-embedded-build-system.html
that I tested, or also
https://pixhawk.ethz.ch/tutorials/omap/openembedded_bitbake_installation

If you follow the instructions, the installation should come to a successful end and you will see all the needed directories .
Bye.
Nicola



--
View this message in context: http://gumstix.8.n6.nabble.com/Direct-register-access-control-of-GPIO-ARM-interface-on-Overo-Water-TOBI-SOLVED-tp4965117p4965125.html
Sent from the Gumstix mailing list archive at Nabble.com.

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overo air, does the wifi needs the uart ?

kris duff
In reply to this post by Nicola

Hello,

I need 3 uart on my design and on the gumstix website, it is written that the uart 2 is used on the wifi/bt module.  I know that the bt uses the serial protocol but does the wifi need it too ?

I will not need BT but could need wifi.

I know by modifying the portmux we can select the route of the signal, but I'm not sure if the wifi will need the uart.

Thank you for your help.

Kris

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Re: overo air, does the wifi needs the uart ?

sudhangathan
Hello Kris,

I hope the schematics are same for AIR and FIRE. I use OVERO-FIRE. The WiFi uses SDIO on these OVEROS... If you tap the UART, only bluetooth will be affected.. There are no other UARTS assigned to the Wi2Wi module as far as i know...
So you can still use the WiFi after doing the changes to portmux.

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Sudhangathan BS
Ph:<a href="tel:%28%2B91%29%209731-905-205" value="+919731905205" target="_blank">(+91) 9731-905-205
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On Fri, Aug 17, 2012 at 6:59 PM, kris duff <[hidden email]> wrote:

Hello,

I need 3 uart on my design and on the gumstix website, it is written that the uart 2 is used on the wifi/bt module.  I know that the bt uses the serial protocol but does the wifi need it too ?

I will not need BT but could need wifi.

I know by modifying the portmux we can select the route of the signal, but I'm not sure if the wifi will need the uart.

Thank you for your help.

Kris

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Re: overo air, does the wifi needs the uart ?

Bob Feretich
In reply to this post by kris duff
Probably not. On the older versions (non-Storm), the Wifi/bt chip is connected to a mmc port.
This is still most likely true. (I have not examined a xxxStorm version Overo.)
The uart does not have the performance to run at WiFi speeds. (The mmc port is 4-bits wide.)

Regards,
Bob Feretich

Subject:
[Gumstix-users] overo air, does the wifi needs the uart ?
From:
kris duff [hidden email]
Date:
8/17/2012 6:29 AM
To:
"General mailing list for gumstix users." [hidden email]


Hello,

I need 3 uart on my design and on the gumstix website, it is written that the uart 2 is used on the wifi/bt module.  I know that the bt uses the serial protocol but does the wifi need it too ?

I will not need BT but could need wifi.

I know by modifying the portmux we can select the route of the signal, but I'm not sure if the wifi will need the uart.

Thank you for your help.

Kris


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threat landscape has changed and how IT managers can respond. Discussions
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threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
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Re: overo air, does the wifi needs the uart ?

kris duff
Thank you :-)


From: Bob Feretich <[hidden email]>
To: [hidden email]
Cc: [hidden email]
Sent: Friday, August 17, 2012 12:48:52 PM
Subject: Re: [Gumstix-users] overo air, does the wifi needs the uart ?

Probably not. On the older versions (non-Storm), the Wifi/bt chip is connected to a mmc port.
This is still most likely true. (I have not examined a xxxStorm version Overo.)
The uart does not have the performance to run at WiFi speeds. (The mmc port is 4-bits wide.)

Regards,
Bob Feretich

Subject:
[Gumstix-users] overo air, does the wifi needs the uart ?
From:
kris duff [hidden email]
Date:
8/17/2012 6:29 AM
To:
"General mailing list for gumstix users." [hidden email]


Hello,

I need 3 uart on my design and on the gumstix website, it is written that the uart 2 is used on the wifi/bt module.  I know that the bt uses the serial protocol but does the wifi need it too ?

I will not need BT but could need wifi.

I know by modifying the portmux we can select the route of the signal, but I'm not sure if the wifi will need the uart.

Thank you for your help.

Kris


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threat landscape has changed and how IT managers can respond. Discussions
will include endpoint security, mobile security and the latest in malware
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
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Re: overo air, does the wifi needs the uart ?

Elvis Dowson-2
Hi,


From: Bob Feretich <[hidden email]>
To: [hidden email]
Cc: [hidden email]
Sent: Friday, August 17, 2012 12:48:52 PM
Subject: Re: [Gumstix-users] overo air, does the wifi needs the uart ?

Probably not. On the older versions (non-Storm), the Wifi/bt chip is connected to a mmc port.
This is still most likely true. (I have not examined a xxxStorm version Overo.)
The uart does not have the performance to run at WiFi speeds. (The mmc port is 4-bits wide.)

The TI OMAP chips have a pin muxing capability. This means that the internal peripheral controllers can be bought out on different physical pins. The various options are listed in the OMAP Technical Reference Manual.

In the case of the Overo Fire, it uses an integrated Wifi/Bluetooth chip. However, the WiFi module uses an MMC/SDIO channel. As for the Bluetooth/UART2 port, check the schematics and pin mux-settings to see if it is connected to the UART. I don't remember off-hand. 

If you want to enable UART2 on the Overo Fire, then you will have to end-up disabling the Bluetooth interface, to enable UART2 to allow it to be exposed on the expansion header.

For example, here is a patch that you can apply to u-boot to disable bluetooth and enable UART 2. You can add this patch to your u-boot OpenEmbedded recipe
and build u-boot. This approach sets the pin muxing at boottime. Another option is to reconfigure it in the kernel.

diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h
index 0b59120..59dc76d 100644
--- a/board/omap3/overo/overo.h
+++ b/board/omap3/overo/overo.h
@@ -213,14 +213,14 @@ const omap3_sysinfo sysinfo = {
 MUX_VAL(CP(MMC2_DAT6), (IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
 MUX_VAL(CP(MMC2_DAT7), (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
 /*Bluetooth*/\
- MUX_VAL(CP(MCBSP3_DX), (IEN  | PTD | DIS | M1)) /*UART2_CTS*/\
- MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
- MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\
- MUX_VAL(CP(MCBSP3_FSX), (IEN  | PTD | DIS | M1)) /*UART2_RX*/\
+ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
+ MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M0)) /*McBSP3_DR*/\
+ MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP3_CLKX*/\
+ MUX_VAL(CP(MCBSP3_FSX), (IDIS | PTD | DIS | M0)) /*McBSP3_FSX*/\
 MUX_VAL(CP(UART2_CTS), (IEN  | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
 MUX_VAL(CP(UART2_RTS), (IEN  | PTD | DIS | M4)) /*GPIO_145*/\
- MUX_VAL(CP(UART2_TX), (IEN  | PTD | DIS | M4)) /*GPIO_146*/\
- MUX_VAL(CP(UART2_RX), (IEN  | PTD | DIS | M4)) /*GPIO_147*/\
+ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+ MUX_VAL(CP(UART2_RX), (IEN  | PTD | DIS | M0)) /*UART2_RX*/\
 MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
 MUX_VAL(CP(UART1_RTS), (IEN  | PTU | DIS | M4)) /*GPIO_149*/ \
 MUX_VAL(CP(UART1_CTS), (IEN  | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
-- 

To find out more about the wifi interface and setup using MMC/SDIO interface, see the linux kernel sources and go through the file board-overo.c. In general, all embedded wifi solutions use an MMC/SDIO interface (e.g. TI WLAN WL1271 chipsets, etc).

Best regards,

Elvis Dowson



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